Lawrence Livermore National Laboratory

This job posting is no longer active

Design Engineer

Location:  Livermore, CA
Category:  Science & Engineering
Organization:  Engineering
Posting Requirement:  External w/ US Citizenship
Job ID: 103886
Job Code: Science & Engineering MTS 1 (SES.1) / Science & Engineering MTS 2 (SES.2)
Date Posted: June 04 2018

Share this Job

Apply Now

Apply For This Job

Science and Technology on a Mission!

For more than 60 years, the Lawrence Livermore National Laboratory (LLNL) has applied science and technology to make the world a safer place.

We have an opening for a Printed Circuit Board (PCB) Design Engineer. You will be responsible for the design, development, and detailed layout of circuit boards for high voltage (many kV), high current (many kA), and high speed (nanosecond) circuits. You will contribute to LLNL’s Enhanced Capability for Sub-Critical Experiment (ECSE) efforts and collaborate with engineers and design teams designing electronic and mechanical systems for the next generation of pulse power systems, accelerators systems, and experimental platforms. This position is in the National Security Engineering Division (NSED) within the Engineering Directorate.

This position will be filled at either the SES.1 or SES.2 level depending on your qualifications. Additional job responsibilities (outlined below) will be assigned if the candidate is hired at the higher level.

Essential Duties
- Contribute to the technical electronics design, fabrication, evaluation, testing, review, and documentation of a wide variety of high-voltage, high-current, and fast switching pulse power research and development projects. Work collaboratively with other team members and design teams in the design and development of complex, detailed layouts of rigid and flexible printed circuit boards in pulsed power, power electronics, and electromagnetic systems using CAD and CAE applications and tools.
- Research, evaluate, test, recommend and contribute to the development of PCB designs and their components with the goal of integrating those technologies into reliable and robust subsystems, systems, and product designs.
- Work closely with other engineers and design teams to optimize the design of the PCBs with respect to layout, electrical and mechanical constraints, manufacturability, and relative costs of various alternatives.
- Perform engineering calculations to support technical work using standard engineering formulas.
- Provide solutions to problems of limited complexity that require use of standard techniques and/or methodologies.
- Maintain product configurations and cost control through BOMs and structured PDM processes.
- Review completed drawings and other documentation of limited complexity to ensure adherence to standard LLNL drafting specifications.
- Perform incoming quality checks and final acceptance testing of outsourced boards.
- Perform other duties as assigned.
In Addition, at the SES.2 Level
- Perform moderately complex to complex CAD and CAE tasks requiring skill and knowledge of equipment capabilities, applications techniques, and design limitations.
- Simulate electromagnetic and/or physical phenomena on printed circuit boards using the appropriate simulation tools, which may range from SPICE-based circuit solvers to full-wave electromagnetic solvers running on LLNL’s Advanced Scientific Computing (ASC) platforms.
- Contribute to the development, coordination, and execution of product performance testing in the lab for a wide range of designs and analyze and interpret the results. Qualify and select PCB fabrication houses and develop strong vendor relationship.

- Bachelor’s degree in Electrical Engineering, Physics, or a related field, or the equivalent combination of education and related experience.
- Demonstrated ability to provide solutions to problems in electromagnetics (including impedance matching, high-voltage breakdown mitigation, antenna design and transmission line design, or electromagnetic diagnostic and instrumentation, and related areas).
- Understanding and fundamental knowledge of electrical and mechanical design principles and demonstrated ability to solve standard technical problems by identifying/developing solutions.
- Fundamental knowledge and understanding of function, fabrication, processes, and packaging of electronic systems and/or mechanical hardware.
- Knowledge in PCB designs, electrical schematics, engineering hardware design, fabrication, assembly techniques, materials, testing processes, and manufacturing methods.
- Demonstrated ability to read and follow engineering notes, sketches, drawings specifications, and procedures.
- Effective written and verbal communication and presentation skills to collaborate effectively in a team environment and present and explain technical information.
- Fundamental knowledge of the standards, procedures, and techniques related to drafting including knowledge of ASME Y14.5M Geometric Dimensioning and Tolerancing Standard.
In Addition at the SES.2 Level
- Comprehensive knowledge and experience using computational tools and techniques to perform design and analysis of electromagnetic devices, circuit boards, and components.
- Proficient verbal and written communication skills necessary to effectively collaborate and present and explain technical information in a multi-disciplinary team environment.
- Demonstrated ability to effectively manage multiple tasks, projects, and priorities.

Desired Qualifications
- Experience in one or more of the following layout techniques; Switch Mode Power Supply layout techniques, Impedance Control and Transmission Line layout techniques, Analog design layout techniques, RF design layout techniques, and/or EMC/EMI mitigation layout techniques.
- Familiarity with the PCB layout process, IPC Standards, along with high voltage circuit board creepage and clearance requirements.
- Familiarity with Altium Designer, Cadence Allegro, and/or Mentor Graphics PADS Layout PCB layout tools and schematic capture.

Pre-Employment Drug Test:  External applicant(s) selected for this position will be required to pass a post-offer, pre-employment drug test. This includes testing for use of marijuana as Federal Law applies to us as a Federal Contractor.

Security Clearance:  This position requires a Department of Energy (DOE) Q-level clearance.

If you are selected, we will initiate a Federal background investigation to determine if you meet eligibility requirements for access to classified information or matter. In addition, all L or Q cleared employees are subject to random drug testing.  Q-level clearance requires U.S. citizenship.  If you hold multiple citizenships (U.S. and another country), you may be required to renounce your non-U.S. citizenship before a DOE L or Q clearance will be processed/granted.

Note:   This is a Career Indefinite position. Lab employees and external candidates may be considered for this position.

About Us

Lawrence Livermore National Laboratory (LLNL), located in the San Francisco Bay Area (East Bay), is a premier applied science laboratory that is part of the National Nuclear Security Administration (NNSA) within the Department of Energy (DOE).  LLNL's mission is strengthening national security by developing and applying cutting-edge science, technology, and engineering that respond with vision, quality, integrity, and technical excellence to scientific issues of national importance.  The Laboratory has a current annual budget of about $1.8 billion, employing approximately 6,500 employees.


LLNL is an affirmative action/ equal opportunity employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, marital status, national origin, ancestry, sex, sexual orientation, gender identity, disability, medical condition, protected veteran status, age, citizenship, or any other characteristic protected by law.